With Calibre nmLVS-Recon software, a designer can efficiently perform short isolation (SI) to identify circuit errors. Calibre nmLVS-Recon software provides intelligent, automated analysis of immature and incomplete designs for circuit verfication use models.Gray boxing further accelerates performance and improves designer debug productivity by supressing nuisance DRC, resulting in up to 50 percent faster runtimes compared to nmDRC-Recon alone. Extending the speed and designer debug gains already possible with the nmDRC-Recon use model, Siemens has now added the capability to flexibly “gray-box” out immature cells and blocks, yet still check DRC for interfaces to adjacent blocks or upper-level metal. The Calibre nmDRC-Recon use model in Calibre RealTime Digital provides intelligent, automated analysis of immature and incomplete designs across blocks, macros, and full-chip layouts to methodically find and fix high-impact physical layout earlier in the design and verification flow.Calibre RealTime Digital now enables in-design fill with Calibre Yield Enhancer SmartFill, enabling designers to get foundry signoff fill from within their design cockpit, while Calibre RealTime Custom has added the ability to automatically track DRC across multiple regions to enable multiple edits to be fixed, tracked and checked simultaneously. The Calibre RealTime interfaces provide direct calls to Calibre analysis engines running foundry-qualified signoff Calibre rule decks, helping to improve both design speed and quality of results by providing immediate feedback on design rule violations and recommended rule compliance. The Calibre RealTime Custom and Calibre RealTime Digital software tools, which provide in-design, signoff-quality Calibre DRC for custom, analog/mixed-signal, and digital designs.Among the new functionalities for the Calibre platform are:
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